VN0610L, vn10kls, vn2222l vishay siliconix document number: 70213 s-00200erev. e, 21-feb-00 www.siliconix.com faxback 408-970-5600 11-1 n-channel enhancement-mode mosfet ezener gate
part number v (br)dss min (v) r ds(on) max ( ) v gs(th) (v) i d (a) VN0610L 60 5 @ v gs = 10 v 0.8 to 2.5 0.27 vn10kls 60 5 @ v gs = 10 v 0.8 to 2.5 0.31 vn2222l 7.5 @ v gs = 10 v 0.6 to 2.5 0.23 zener diode input protected low on-resistance: 3 ultralow threshold: 1.2 v low input capacitance: 38 pf low input and output leakage extra esd protection low offset voltage low-voltage operation high-speed, easily driven low error voltage drivers: relays, solenoids, lamps, hammers, displays, memories, transistors, etc. battery operated systems solid-state relays inductive load drivers 1 to-92s top view s d g 2 3 1 to-226aa (to-92) top view s d g 2 3 vn10kls VN0610L vn2222l
parameter symbol vn2222l VN0610L vn10kls unit drain-source voltage v ds 60 60 v gate-source voltage v gs 15/0.3 15/0.3 v continuous drain current (t j = 150 c) t a = 25 c i d 0.27 0.31 a continuous drain current (t j = 150 c) t a = 100 c i d 0.17 0.20 a pulsed drain current a i dm 1 1.0 power dissipation t a = 25 c p d 0.8 0.9 w power dissipation t a = 100 c p d 0.32 0.4 w maximum junction-to-ambient r thja 156 139 c/w operating junction and storage temperature range t j , t stg 55 to 150 c notes a. pulse width limited by maximum junction temperature.
VN0610L, vn10kls, vn2222l vishay siliconix www.siliconix.com faxback 408-970-5600 11-2 document number: 70213 s-00200erev. e, 21-feb-00
limits VN0610L vn10kls vn2222l parameter symbol test conditions typ a min max min max unit static drain-source breakdown voltage v (br)dss v gs = 0 v, i d = 100 a 120 60 60 v gate-threshold voltage v gs(th) v ds = v gs , i d = 1 ma 1.2 0.8 2.5 0.6 2.5 v gate-body leakage i gss v ds = 0 v, v gs = 15 v 1 100 100 na zero gate voltage drain current i dss v ds = 48 v, v gs = 0 v 10 10 a zero gate v oltage drain current i dss t j = 125 c 500 500 a on-state drain current b i d(on) v ds = 10 v, v gs = 10 v 1 0.75 0.75 a dis or i b v gs = 5 v, i d = 0.2 a 4 7.5 7.5 drain-source on-resistance b r ds(on) v gs = 10 v, i d = 0.5 a 3 5 7.5 t j = 125 c 5.6 9 13.5 forward transconductance b g fs v ds = 10 v, i d = 0.5 a 300 100 100 ms common source output conductance b g os v ds = 7.5 v, i d = 0.05 a 0.2 ms dynamic input capacitance c iss v 25v v 0v f 1mh 38 60 60 f output capacitance c oss v ds = 25 v, v gs = 0 v, f = 1 mhz 16 25 25 pf reverse transfer capacitance c rss 2 5 5 switching c turn-on time t on v dd = 15 v, r l = 23 i d 0.6 a, v gen = 10 v 7 10 10 ns turn-off time t off i d 0 . 6 a , v gen = 10 v r g = 25 9 10 10 ns notes a. for design aid only, not subject to production testing. vndp06 b. pulse test: pw 300 s duty cycle 2%. c. switching time is essentially independent of operating temperature.
VN0610L, vn10kls, vn2222l vishay siliconix document number: 70213 s-00200erev. e, 21-feb-00 www.siliconix.com faxback 408-970-5600 11-3
ohmic region characteristics output characteristics for low gate drive on-resistance vs. drain current normalized on-resistance vs. junction temperature transfer characteristics on-resistance vs. gate-to-source voltage v gs gate-source voltage (v) v gs gate-source voltage (v) drain current (a) i d drain current (a) i d drain current (ma) i d on-resistance ( r ds(on) v ds drain-to-source voltage (v) v ds drain-to-source voltage (v) i d drain current (a) t j junction temperature ( c) r ds(on) drain-source on-resistance (normalized) 1.0 0123 45 0.8 0.6 0.4 0.2 0 6 v 4 v 5 v 2 v 3 v t j = 25 c 50 0 0.4 0.8 1.2 1.6 2.0 40 30 20 10 0 1.9 v 1.8 v 1.6 v 1.5 v 1.2 v 1.4 v t j = 25 c 0.5 0.4 0.3 0 01 5 0.2 0.1 234 125 c t j = 55 c 5 4 3 0 0 0.2 1.0 2 1 0.4 0.6 0.8 2.25 2.00 1.75 0.50 50 10 150 1.50 1.25 30 70 110 1.00 0.75 0.1 a 7 0 4 8 12 16 20 6 5 4 0 3 2 1 250 ma 500 ma t j = 25 c r ds(on) drain-source on-resistance ( v gs = 2.0 v v gs = 10 v v ds = 15 v i d = 50 ma v gs = 10 v v gs = 10 v i d = 0.5 a ) ) 25 c
VN0610L, vn10kls, vn2222l vishay siliconix www.siliconix.com faxback 408-970-5600 11-4 document number: 70213 s-00200erev. e, 21-feb-00
1 0.1 0.5 1.0 100 10 v dd = 15 v r l = 25 v gs = 0 to 10 v threshold region capacitance normalized effective transient thermal impedance, junction-to-ambient (to-226aa) gate charge load condition effects on switching normalized effective transient thermal impedance t 1 square wave pulse duration (sec) i d drain current (a) v ds drain-to-source voltage (v) v gs gate-to-source voltage (v) q g total gate charge (pc) drain current (ma) i d c capacitance (pf) gate-to-source voltage (v) v gs t switching time (ns) t d(on) t d(off) t r t f 10 1 0.01 0 0.25 1.75 0.1 0.5 0.75 1.0 1.25 1.5 100 c 25_c 55 c 0 c t j = 150 c 100 80 60 0 010 50 40 20 20 30 40 15.0 12.5 10.0 0 0 100 600 7.5 5.0 200 300 400 2.5 500 30 v 48 v 10 k duty cycle = 0.5 0.2 0.1 0.05 0.02 single pulse 1 0.01 0.1 0.01 0.1 1 100 10 1 k 1. duty cycle, d = 2. per unit base = r thja = 156 c/w 3. t jm t a = p dm z thja (t) t 1 t 2 t 1 notes: p dm t 2 i d = 0.5 a v gs = 0 v f = 1 mhz c iss c oss c rss
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